| ·0x： | Hexadecimal prefix |
| ·ATM： | Asynchronous Transfer Mode |
| ·BCSR： | BIU Configuration and Status Register |
| ·BER： | Bit Error Rate |
| ·BIU： | Bus Interface Unit |
| ·CCIR： | CIU Command Interface Registers |
| ·CCSR： | CIU Configuration and Status Register |
| ·CIU： | Control Interface Unit |
| ·CRC： | Cyclic Redundancy Check |
| ·DC： | Direct Current |
| ·DLL： | Data Link Layer |
| ·DMA： | Direct Memory Access |
| ·DPRAM： | Dual Post Random Access Memory |
| ·FIFO： | First In First Out - A FIFO is a specialized memory structure that operates such that data is written to the
input port, and is read from the output port in the same order that it was written. |
| ·FWHM： | Full Width Half Maximum |
| ·HEC： | Header Error Check |
| ·I&T： | Integration and Test |
| ·LAB： | Latency Adjust Buffer |
| ·MDPL： | Media Dependent Physical Layer |
| ·ML： | Management Layer |
| ·NMDPL： | Non-Media Dependent Physical Layer |
| ·NRZ： | Non-Return to Zero |
| ·OH： | Overhead |
| ·OSI： | Open System Interconnection – The OSI Model describes a layered structure for communications
protocol design. |
| ·Rx： | Receiver (when referring to the fiber optic receivers)
Received (when referring to data or Subframe OH) |
| ·SDU： | Service Data Unit |
| ·SEU： | Single Event Upset |
| ·SMA： | Sub Miniature Assembly |
| ·TDMA： | Time Division Multiple Access |
| ·Tx： | Transmitter (when referring to the fiber optic transmitters)
Transmitted (when referring to data or Subframe OH) |
| ·VCI： | Virtual Channel Identifier |
| ·VPI： | Virtual Path Identifier |